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LC01707PLF
Acknowledge (Receive acknowledge)
When the master generates the acknowledge clock pulse, the transmitter opens the SDA line. (SDA line enters the [H]
state.) When the acknowledge clock pulse is in the [H] state, the receiver sets the SDA line to [L] each time it receives
one byte (eight bits) data. When the master works as a receiver, the master informs the slave of the end of data by
omitting acknowledge at the end of data sent from the slave.
Release the SDA line(HIGH)
Data output by
transmitter
NACK(master is receiver)
Data output by
receiver
ACK(master is transmitter)
SCL from
master
1
2
8
9
S
START condition
ACK:acknowledgement
NACK:not acknowledgement
Clock pulse for ACK
Software reset
If the communication is interrupted (microcomputer reset, etc.), it is possible to communicate normally by entering the
below signals and resetting the CPU in software.
*These signal timings restore the communication after its interruption. The register setting is never reset.
*Software reset command is incompatible with I 2 C-bus format.
SDA
SCL
S
1
2
7
8
9
Sr
P
START condition
Repeated START condition
STOP cindition
No.A1928-10/18
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